发明名称 Ternary logic circuit using resonant-tunneling transistors
摘要 A logic gate including a resonant-tunneling transistor and a resistor connected in series thereto. The resonant-tunneling transistor has a superlattice structure. The resonant-tunneling transistor may be a resonant-tunneling hot electron transistor or a resonant-tunneling bipolar transistor. The resonant-tunneling transistor conducts a current between a collector and an emitter. The current has one of at least three different current values in response to a base voltage of one of three different voltage values. The third current value is between the first and second current values, and a second voltage value is between the first and third voltage values. The logic gate outputs one of at least three states, a high state, a low state and a state approximately between the high and low states in response to a signal applied to the logic gate. The signal has an amplitude of one of the first to third voltage values. A logic circuit includes at least three connected resonant-tunneling transistors. The logic circuit maintains at least three states, a high state, a low state, and a state approximately between the high and low states in the respective three resonant-tunneling transistors in response to a pulse signal applied to a base of one of the resonant-tunneling transistors.
申请公布号 US4956681(A) 申请公布日期 1990.09.11
申请号 US19890310463 申请日期 1989.02.15
申请人 FUJITSU LIMITED 发明人 YOKOYAMA, NAOKI;TAGUCHI, MASAO
分类号 H03K19/082;F16L55/00;G11C11/34;G11C11/39;G11C11/56;H01L21/331;H01L29/205;H01L29/73;H01L29/737;H03K3/29;H03K3/36;H03K19/02;H03K19/14;H03K19/20 主分类号 H03K19/082
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