| 摘要 |
<p>PURPOSE:To absorb the change of the clock duty and the variance on production by varying the extent of delay of the clock signal and data of an IC on the data reception side and discriminating whether relations between a proper delay time for each extent of delay and a setup time are proper or not. CONSTITUTION:Three kinds of data different in extent of delay, namely, data outputted from a semiconductor integrated circuit (IC) 11 and data delayed by delay circuits 31 and 32 are inputted to a multiplexer 23, and one of these data is selected and is outputted to the data terminal of a flip flop 25. Three kinds of clock signal different in extent of delay, namely, the clock signal and clock signals delayed by delay circuits 33 and 34 are inputted to a multiplexer 24, and one of these clock signals is selected and is outputted to the clock terminal of the flip flop 25. It is discriminated by a microcomputer 33 whether timing relations between the clock signal and data are proper or not. Thus, the delay time and the set-up time are arbitrarily set.</p> |
