| 摘要 |
<p>PURPOSE:To accomplish the high throughput, the low cost and the high yield of a display by positioning the source, the drain and the gate part of a TFT with one mask. CONSTITUTION:An intrinsic polycrystalline silicone film 1 is heaped on a glass substrate 6 and resist is removed after performing the patterning of the silicone film 1. Thereafter, a SiO2 film is heaped and patterning and ion implantation are performed so as to form a part as a low resistance layer 2. A gate SiO2 film 3 and a Cr electrode 4 are successively heaped and the patterning of the Cr electrode 4 and the gate SiO2 film 3 is successively performed by one resist stage and plural etching stages. Then, an ITO 5 is heaped and the resist is removed after performing the patterning of only the ITO 5 by one resist stage and one etching stage. Namely, the gate, the source, the drain part of the TFT are positioned with one mask in such procedure. Thus, the formation of the TFT is facilitated.</p> |
