发明名称 DEETADENSONIOKERUJIDOSAISOHOSHIKI
摘要 PURPOSE:To obtain the throughput properties approximate to an ideal form, by providing only a buffer memory of a small capacity in case the data block is continuously transmitted through a circuit having a long delay time of reply. CONSTITUTION:A buffer memory of the transmitter side has a limited length equivalent at least to the delay time of a reply. In case this buffer memory has an idle space, an NACK (negative reply) is transmitted to the data block that cannot be supplied to the buffer memory since it is not received in a correct way and in an SR (Selective Repeating) system. In case an error data block which is not the oldest is received in a correct way and can be supplied to the buffer memory, an affirmative retransmission request signal ACK is transmitted to request the retransmission of the oldest error data block. As a result, the throughput properties can be improved in case a receiving buffer memory of a small capacity is used.
申请公布号 JPH0239141(B2) 申请公布日期 1990.09.04
申请号 JP19810029959 申请日期 1981.03.04
申请人 KOKUSAI DENSHIN DENWA CO LTD 发明人 TAKAHASHI TOSHIO;YASUNAGA MASAYUKI
分类号 H04L1/16;H04L1/18 主分类号 H04L1/16
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