Fabrication method for high speed and high packing density semiconductor device (BiCMOS)

摘要

A fabrication method for a high speed and high packing density semiconductor device (BiCMOS) in which high speed polysilicon self-aligned bipolar transistors and high packing density CMOS are contained on the same wafer in such a manner that simplicity in fabrication is attained, while the high speed of operation and the high packing density of array are simultaneously realized.