| 摘要 |
PURPOSE:To improve a processing speed by providing 1st and 2nd input means which input and store data from a 1st bus and store them in 1st and 2nd memories and 1st and 2nd output means which fetch the data from the 1st and 2nd memories and output them to a 2nd bus, be executing write and read simultaneously. CONSTITUTION:When a write request signal 1 is inputted, one of the 1st and 2nd input means 5 and 7 corresponding to the value of a one-bit counter 2 where the falling of a previous write request signal is updated inputs the data from the 1st bus 3 and writes the data in the 1st or 2nd memory 4 or 6 corresponding to the input means 5 or 7. At this time, when a read request signal 8 is inputted while a write request signal 1 is inputted, the 1st or 2nd output means 10 or 11 corresponding to a memory where data is not written currently outputs the data to the 2nd bus 9. Thus, even if data is written in and read out of the same address at the same time, operation is performed without any contradiction. Consequently, the processing speed is improved. |
