Bi-CMOS semiconductor device having memory cells formed in isolated wells.

摘要

A Bi-CMOS semiconductor device includes a P-type semiconductor substrate (10), an N-type buried layer (13) formed in the semiconductor substrate (10), a P-type well region (16) formed on the buried layer (13), and an N-channel MOS transistor formed in a first predetermined area of the well region (16). The Bi-CMOS semiconductor device further includes an N-type surrounding layer (22) formed to surround the well region (16) in cooperation with the buried layer (13). The surrounding layer (22) electrically isolates the well region (16) from the substrate (10) and the other P-type well region.