LOGIC CIRCUIT FOR TASK PROCESSING

摘要

In a logic circuit having a plurality of clocked state latches (SRL) and combinatorial logic for functional processing of a task in response to functional clocking C min -B min of the state latches, the state latches are additionally interconnected to form a scannable chain of latches, and task switching logic 12,14 is provided for suspending task processing by interrupting the functional clocking C min -B min of the state latches and, during said suspension, for scanning the state latches such that existing contents of the state latches defining a task state can be saved from the state latches and/or new contents defining a task state can be loaded into the state latches. The invention provides an efficient means for switching tasks being performd by a logic circuit in a multiprocessing environment.