发明名称 |
Unconditional clock and automatic refresh logic |
摘要 |
A novel unconditional clock and automatic refresh logic system is provided which comprises a source of unconditional clock pulses coupled to the memory control logic in a manner which permits automatic refreshing of a dynamic memory. There is further provided clock logic means which sense the conditions in the dynamic memory system during which the dynamic memory is not being refreshed. There is further provided, means for generating automatic clock refresh signals coupled to the memory control logic for initiating continuous automatic refresh cycles when the system clock is being shutdown.
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申请公布号 |
US4953131(A) |
申请公布日期 |
1990.08.28 |
申请号 |
US19880241421 |
申请日期 |
1988.09.07 |
申请人 |
UNISYS CORPORATION |
发明人 |
PURDHAM, DAVID M.;SCHEUNEMAN, JAMES H.;BYERS, LARRY L.;SYCH, TERENCE;TSANG, KWISOOK |
分类号 |
G11C11/406 |
主分类号 |
G11C11/406 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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