发明名称 PULSE AMPLIFYING CIRCUIT
摘要 PURPOSE:To suppress the occurrence of inductive pulse voltage due to electrostatic induction, by setting the bias voltage of the input terminal of an up- switching element higher than the supply voltage of the output terminal of the corresponding up-transistor. CONSTITUTION:The gate bias voltage VGu of an up-switching element MOST. Qu is supplied from the voltage VB which is about 1.5 times as high as the voltage VS that is supplied to a power supply terminal 3. Thus the Qu is always on, and accordingly the potential of an output terminal 2 is never set to a floating state. Then the output pulse voltage Vo always keeps the value VS within a time region T1. As a result, the inductive pulse voltage caused by the electrostatic induction like (e) is suppressed although the pulse voltage of a high crest level is produced just near a circuit since the potential of the terminal 2 is not floating.
申请公布号 JPS5821920(A) 申请公布日期 1983.02.09
申请号 JP19810121226 申请日期 1981.07.31
申请人 FUJITSU KK 发明人 KAWADA TOYOSHI;YAMAGUCHI HISASHI
分类号 H03K5/02;H03K17/687 主分类号 H03K5/02
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