发明名称 SHINGOSHORISOCHI
摘要 PURPOSE:To extract only desired signals out of input signals and to increase the ratio between a carrying level and noise, by detecting the signal of a prescribed level out of an output signals of an A/D converter and deleting the output signal of the A/D converter when a detected level is higher than a prescribed value. CONSTITUTION:An input analog signal receives A/D conversion 32, and this digital signal is supplied to a time compression processor 33 to undergo time compression and time division processes. The output signal of the processor 33 is branched into two parts. One of these two branched signals is fed to a zero detector 34 and the other signal is fed to a delaying device 38, respectively. A counter 35 detects the zero level out of the input signals and supplies it to a counter 35. The counter 35 counts the number of zero signals, and this counting value is compared with the reference value through a comparator 36. The comparator 36 inactivates a block time controlling circuit 37 when the reference value is larger than the counting value and actuates the controller 37 when the reference value is smaller than the counting value by delivering a signal to the controller 37. The input signal is delayed by the device 38 by the working time from the detector 34 to the controller 37 and fed to a gate circuit 39. The circuit 39 opens only when the reference value is larger than the counting value, and the input signal is delivered after a D/A conversion 40.
申请公布号 JPH0237731(B2) 申请公布日期 1990.08.27
申请号 JP19810118200 申请日期 1981.07.28
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 HARUHARA HIROSHI
分类号 G01R23/16;H03M1/00;H04B1/10;H04B14/04 主分类号 G01R23/16
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