| 摘要 |
The cache system incorporating a cache memory (33) uses an LRU (Least Recently Used) scheme in replacement algorithm of cache blocks and comprises a directory memory (35) whose entries have LRU counter (36) fields, a host system which issues a read/write command to which an arbitrary LRU setting value is appended, a directory search circuit, and a microprocessor. The directory search circuit (34) searches the directory memory in response to the read/write command issued from the host system (11). The microprocessor stores the LRU setting vlaue appended to the read/ write command in the LRU counter field of the hit entry of the directory memory or of the entry corresponding to the replacement target cache block, in response to the search result of the directory search circuit.
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