| 摘要 |
The semiconductor memory device comprises a number of blocks of memory cells, the blocks being separated from each other. A number of write circuit respectively are operatively connected to the memory cell blocks, for writing data. A simultaneous write enable circuit for a test mode, is connected to the write circuits for simultaneously performing a write operation upon meory cell blocks via the write circuits. A number of data output circuits means, respectively are operatively connected to the memory cell blocks, for storing data read out of the memory cell blocks, each of the data output circuits having true and complementary output signal lines. In the pair of output circuits, one is driven by the true output signal lines of the data output ciruit and the other is driven by the complementary output siganl lines of the data circuit. +
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