发明名称 PHASE JITTER SUPPRESSING DEVICE
摘要 PURPOSE:To suppress phase jitter without incurring amplification of undesired noise by detecting a phase jitter frequency and applying phase correction to only a reception signal of the frequency. CONSTITUTION:A phase error calculation circuit 6 obtains a phase error thetaE, a phase error signal (a) is inputted to plural band pass filters 8 and separated into a frequency component of each filter. A jitter frequency identification circuit 9 calculates power of an output signal of each band filter 8, resulting in selecting an output signal with the largest power. A conversion circuit 12 converts a signal from an adder 11 into a phase correction angle signal (b) and outputs the signal to a complex number multiplier 2. The complex number multiplier 2 multiplies the phase correction angle signal (b) with a complex number base band signal, applies phase correction to eliminate a phase jitter. Thus, the phase jitter is suppressed without incurring amplification of undesired noise.
申请公布号 JPH02213254(A) 申请公布日期 1990.08.24
申请号 JP19890032991 申请日期 1989.02.13
申请人 NEC CORP 发明人 HIRAGUCHI MASAYOSHI
分类号 H04L27/38 主分类号 H04L27/38
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