发明名称 |
METHOD AND ARRANGEMENT FOR ADAPTING A CLOCK TO A PLESIOCHROMIC DATA SIGNAL AND FOR CLOCKING THE DATA SIGNAL WITH THE ADAPTED CLOCK |
摘要 |
A method and an apparatus for adapting a locallygenerated clock having an arbitrary phase relation to a plesiochromic data signal in which further clocks are derived from the clock via a delay line chain in such a fashion that a clock sequence having identical phase spacings is produced. These clocks are clocked by the data signal in edge-triggered D flip-flops. The difference between the logical states of the Q outputs of two neighboring D flip-flops provides a preselection of the best-adapted clock. Proceeding from the Q outputs and Q outputs of the D flip-flops and the non-inverting and inverting outputs of a plurality of amplifiers, a gate arrangement connects an optimally-adapted clock to a clock output. A data signal is delayed in a delay unit by the time that the selection of the optimally adapted clock requires. This then clocks the delayed data signal in an edge-triggered D flip-flop.
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申请公布号 |
CA2010596(A1) |
申请公布日期 |
1990.08.23 |
申请号 |
CA19902010596 |
申请日期 |
1990.02.21 |
申请人 |
SIEMENS AKTIENGESELLSCHAFT |
发明人 |
KRAEMER, HORST;KLINGER, KARLHEINZ |
分类号 |
H04L7/033;(IPC1-7):H03K5/14 |
主分类号 |
H04L7/033 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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