| 摘要 |
<p>A tri-state output buffer has a signal input terminal (22), a control terminal and a signal output terminal (12) and is controlled by a control signal (Hi-Z, Hi-Z) applied to the control terminal (24,26) so as to be selectively put in an inactive condition maintaining the signal output terminal (12) in a high impedance condition and in an active condition bringing the signal output terminal (12) either into a high level or into a low level in response to a signal applied to the signal input terminal (22). The tri-state output buffer comprises a pre-buffer circuit having an input node connected to the signal input terminal (22), and an output node, and controlled by the control signal (Hi-Z, Hi-Z) applied to the control terminal (24,26) so as to selectively bring the output node into a high impedance condition or into an active condition assuming either a high level or a low level in response to the signal applied to the signal input terminal (22). A bipolar transistor (10) is connected between a power supply voltage (Vcc) and a ground (GND) and has a base connected to the output node of the pre-buffer circuit and an emitter connected to the signal output terminal (12) of the tri-state output buffer. A first switching element (28,30) is connected between the ground (GND) and the signal output terminal (12) of the tri-state output buffer and is controlled by the control signal (Hi-Z) applied to the control terminal (26) so as to be selectively turned on and off. A second switching element (40) is connected between the base of the bipolar transistor (10) and the signal output terminal (12) of the tri-state output buffer and is controlled by the control signal (Hi-Z) applied to the control terminal (24) so as to be selectively turned on and off.</p> |
