| 摘要 |
PURPOSE: To prevent overlap, separation, and skew of a clock pulse by performing synchronization and phase control by master clock control to realize internal compatibility of unit cards in one CPU. CONSTITUTION: When a power on clear signal is generated on a line 26, a clock control card 11 is cleared, and this clear signal is distributed to a unit card 23 also. A control card 31 is operated as a slave of the card 11, and cards 11 and 31 are synchronized with each other. A maintenance controller 19 loads 8 start pattern to cards 11 and 31, and the card 11 generates a clock run signal for extension on a line 33, and generators 18 in both of cards 11 and 31 generate run signals on lines 12 and 32. Thus, the phase of the system is synchronized. |
