| 摘要 |
An overload detector for an analog-to-digital converter. A series of logic gates are connected to the output of an analog-to-digital converter for determining the presence of an upper limit and a lower limit of an overload condition. A signal indicative of such a condition is input to circuitry which extends the length of the signal so that it is visible or audible to a user. An algorithm for a computer causes a latch to be engaged when an overload condition occurs. The latch is coupled to a pulse stretching circuit which permits a visible or audible signal to be generated.
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