发明名称 Method and apparatus for switching currents into the summing node of an integrating analog-to-digital converter
摘要 An arrangement of switches and resistors for switching current into the summing node of an integrator uses a pair of switches for each resistor. Each resistor is connected at one end to a reference voltage. The other end of the resistor is connected to a first switch, which is in turn connected to the summing node. A second switch is connected between ground and the junction of the resistor and the first switch. One or the other of the two switches will always be on. When the first switch is on and the second one is off a current will flow from the reference voltage, through the resistor and into the summing node. When the first switch is off and the second one is on essentially the same current will flow from the reference voltage, through the resistor and into ground. The current will be nearly the same, since the virtual ground of the integrator approximates actual ground. This stabilizes the value of the reistor by keeping the power dissipation therein almost exactly constant, and elminates load induced fluctuations in the reference voltage. It also allows each resistor to be disconnected from the summing node, by turning each associated first switch off and each associated second switch on. Under these circumstances no appreciable current from the resistors flows into the summing junction, by virtue of the switches themselves, and without resort to precision cancellation of opposing currents, as in some prior art switching schemes. This feature allows the connection of multiple instances of switched resistor networks to the summing node. One network switched resistors can be put to use while all the others are disconnected.
申请公布号 US4951053(A) 申请公布日期 1990.08.21
申请号 US19890304741 申请日期 1989.01.31
申请人 HEWLETT-PACKARD COMPANY 发明人 DESJARDIN, LAWRENCE A.;GOEKE, WAYNE C.
分类号 H03M1/06;H03M1/12 主分类号 H03M1/06
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