发明名称 |
Image track display apparatus |
摘要 |
Image track display apparatus including a memory for delaying an image signal by at least one vertical scanning period, a first subtraction circuit for taking a first difference signal between the image signal and its delayed image signal through the memory. The first difference signal includes first and second polarity components, a non-linear processing circuit for multiplying the one polarity component of the first difference signal by K times (0<K<1) and for reducing the other polarity component of the first difference signal to the zero value when the other polarity component exceeds a prescribed value, a second subtraction circuit for taking a second difference signal between the output signal of the non-linear processing circuit and the image signal, and a display device for displaying the delayed image signal obtained through the memory circuit.
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申请公布号 |
US4951137(A) |
申请公布日期 |
1990.08.21 |
申请号 |
US19890331319 |
申请日期 |
1989.03.31 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
KISOU, MASAAKI;SHIMODA, KENJI;IKEDA, KAZUMASA;YODA, SHINJI;TAKEUCHI, HISAHARU |
分类号 |
H04N5/21 |
主分类号 |
H04N5/21 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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