发明名称 High speed digital programmable frequency divider
摘要 A high speed digital programmable frequency divider (100) capable of frequency division by even and odd integers is disclosed herein. The frequency divider (100) of the present invention includes a waveform generator (200) for providing a periodic input waveform of a first period and the inverse thereof. The present invention further includes a clocked ring oscillator circuit (400) for providing first and second closed signal paths, in response to the input waveform, disposed to invert signals passing therethrough. The first and second signal paths have a common output node (499) and first and second propagation delays substantially equal to first and second integral multiples of the first period, respectively. In addition, the frequency divider (100) includes a programmable switch network (500) for opening the first and second signal paths to provide a periodic output waveform at the output node (499).
申请公布号 US4951303(A) 申请公布日期 1990.08.21
申请号 US19880264935 申请日期 1988.10.31
申请人 LARSON, LAWRENCE E. 发明人 LARSON, LAWRENCE E.
分类号 H03K21/00;H03K23/44;H03K23/54;H03K23/66 主分类号 H03K21/00
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