发明名称 SYSTEM FOR TESTING PROCESSOR OPERATION
摘要 An interlocking system for a railway comprises a plurality of processors (A, B and C), the system having an input (1) for receiving input information and an output (2) for providing control information. Each of the processors is adapted to test itself to check that it is operating correctly and each of the processors is also adapted to test another of the processors to check that the other processor is operating correctly, each of the processors also being so tested by another of the processors. The system is shut down or put into a more restricted mode of operation if a fault in its operation is detected, either as a result of a processor's self-testing routine or as a result of one of the processors detecting that another processor is not operating correctly. This achieves the integrity of a "dual-channel" system with only a single "channel" of hardware.
申请公布号 AU4925890(A) 申请公布日期 1990.08.16
申请号 AU19900049258 申请日期 1990.02.09
申请人 WESTINGHOUSE BRAKE AND SIGNAL HOLDINGS LIMITED 发明人 TERENCE MALCOLM GEORGE;RICHARD JOHN ROBERTS
分类号 B61L19/06;B61L21/04;G06F11/00;G06F11/16;G06F11/22;G06F11/267 主分类号 B61L19/06
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