发明名称 CONNECTION OF SYNCHRONOUS COUNTER WITH VARIABLE LENGTH
摘要 The solution regards the design of integrated circuits and tackles the circuit layout of the synchronous reversible counter with a selectable length. The wiring layout described can be applied in logical integrated circuits wherever outputs should be switched by a program, or the synchronous counter module should be changed.<IMAGE>
申请公布号 CS271134(B1) 申请公布日期 1990.08.14
申请号 CS19880004506 申请日期 1988.06.27
申请人 POLASEK PAVEL ING.,CS;SRUBAR IVO ING.,CS 发明人 POLASEK PAVEL ING.,CS;SRUBAR IVO ING.,CS
分类号 G06F1/02;(IPC1-7):G06F1/02 主分类号 G06F1/02
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