| 摘要 |
<p>PURPOSE:To execute FFT (fast Fourier transformation) processing at much higher speed by adding function, which outputs an address signal to be outputted to a memory for data in a bit reverse order, to a DMAC (data transfer control circuit). CONSTITUTION:On a chip 10, a DSP (digital signal processor) core 11 to execute various digital signal processing at high speed, memory 12 for instruction to store a processing instruction in the DSP core 11, memory 13 for data to store waveform data, I/O port 14 to be presented for input / output with an external part, DMAC 15 to repeatedly execute data transfer to continuous areas on the memory 13 for data and data buses 16 and 17, etc., are integrated. The function to output the address signal in the bit reverse order is added to the DMAC 15 to transfer the number, which is the second power of 2, of the data between the memory 13 for data and input / output port 14. Thus, it is not necessary to execute the processing to rearrange the input waveform data, which are taken into the memory for data, in the bit reverse order and the FFT processing can be executed at much higher speed.</p> |
