发明名称 BUFFER CIRCUIT MEANS OF TESTER AND CALIBRATION ARRAY AND METHOD
摘要 PURPOSE: To improve the test and diagnosis performance of a microprocessor (μP)-base system by generating a synchronizing signal, which controls signal reception in both of a gated data buffer and a gated status buffer, in response to a signal indicating the operation state of a μP. CONSTITUTION: A bus cycle state machine 200 subjects the signal, which reflects the operation state (status pin) of a UUT14 μP, to logical operation under the control of a main frame and generates a control signal which controls a synchronizing pulse generation state machine 202 which generates the synchronizing signal in response to the signal. The synchronizing signal directly controls gated buffers 214 and 216 to acquire the momentary state of the μP, so that the faulty μP or an improper state of a forced line can be efficiently diagnosed. Thus, the test and diagnosis performance of the μP-base electronic system is improved.
申请公布号 JPH02201547(A) 申请公布日期 1990.08.09
申请号 JP19890304516 申请日期 1989.11.22
申请人 JOHN FLUKE MFG CO INC 发明人 TOOMASU PII ROTSUKU
分类号 G06F11/22;G06F11/26;G06F11/267;G06F11/273 主分类号 G06F11/22
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