发明名称 Method and apparatus for increasing the data storage rate of a computer system.
摘要 <p>In a computer system, the flow of data from an execution unit (20) to a cache (28) is enhanced by pairing individual, sequential longword write operations into a simultaneous quadword write operation. A primary and secondary write buffer (50 52) sequentially receive the individual longwords during first and second clock cycles and simultaneously present the individual longwords over a quadword wide bus to the cache (28). During the first clock cycle, when the cache (28) is not performing the quadword write operation, it is free to perform the requisite lookup routine on the address of the first longword of data to determine if the quadword of address space is available in the cache. Thus, the flow of data to the cache 28 is maximised.</p>
申请公布号 EP0381323(A2) 申请公布日期 1990.08.08
申请号 EP19900300372 申请日期 1990.01.12
申请人 DIGITAL EQUIPMENT CORPORATION 发明人 HETHERINGTON, RICKY C.;FOSSUM, TRYGGVE;SALETT, RONALD M.;WEBB, DAVID A. JR.;MANLEY, DWIGHT P.
分类号 G06F12/08;G06F13/40 主分类号 G06F12/08
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