| 摘要 |
<p>PURPOSE:To reduce the time from the start of a level at an input terminal transited to an L level till a level transition of an output signal is started by providing a 1st N-channel MOS transistor (TR) whose gate receives a signal in an opposite phase to a level at the input terminal and connecting in series with a power level transmission means between a power level and the input terminal. CONSTITUTION:An N-channel MOS TR TN1 whose gate receives an output of a 1st inverter IV1 is inserted in addition in series with a power level transmission means (precharge TR TP1) between a power level Vcc and a bit line BL. Thus, the time after a precharge signal the inverse of PR is transited to an L level and a word line drive signal the inverse of IN1 transits to an H level, till level transition of an output signal OUT is started, and the time after the precharge signal the inverse of PR is transited to an L till the level transition of the output signal OUT is started are much reduced.</p> |
