发明名称 Preprocessing implied specifiers in a pipelined processor.
摘要 <p>An instruction decoder (20) generates implied specifiers for certain predefined instructions, and an operand processing unit (21) preprocesses most of the implied specifiers in the same fashion as express operand specifiers. For instructions having an implied autoincrement or autodecrement of the stack pointer, an implied read or write access type is assigned to the instruction and the decode logic is configured accordingly. Conflicts created by the implied specifiers are handled in the same manner as conflicts for express specifiers. Moreover, by using the same data paths for both the implied specifiers and the express specifiers, and by inserting queues between the instruction unit and the execution unit, performance gains are realised for instructions having implied specifiers as well as just express specifiers.</p>
申请公布号 EP0380849(A2) 申请公布日期 1990.08.08
申请号 EP19890308996 申请日期 1989.09.05
申请人 DIGITAL EQUIPMENT CORPORATION 发明人 FITE, DAVID B.;FIRSTENBERG, MARK A.;MURRAY, JOHN E.
分类号 G06F9/30;G06F9/318;G06F9/38 主分类号 G06F9/30
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