| 摘要 |
PURPOSE:To obtain a stable semiconductor device having low noise levels by dividing a voltage limiter and a drive circuit to compensate their phases, preparing a pulse generating circuit to use selectively a voltage limiter with a control signal and to integrate the voltage limiter into a CMOS, and setting the back gate voltage at a level equal to the source voltage. CONSTITUTION:An internal circuit serving as a load of a voltage limiter is divided into pieces Z1-Z3 together with a drive circuit divided into pieces B1-B3. The phases of these divided circuits are compensated. A feedback amplifier and a phase compensating circuit which are suited to each load circuit can be easily designed by dividing those circuits according to the types and the sizes of the loads. Thus the working of each drive circuit is stabilized. A pulse phi'1 is inputted to a drive circuit B1 synchronously with a timing pulse phi1 which controls the load. Then the circuit constants of a feedback amplifier A1 and a phase compensating circuit C1 are changed to secure the characteristics which are always accordant with the load action mode. Thus the working of the drive circuit is stabilized. These elements are integrated into a CMOS device on an Si substrate 101, and the voltage of a back gate 102 is set at the same level as the working voltage of a source. Thus it is possible to obtain a small sized DRAM having the low noise levels, the low power consumption, and the high speed working. |
