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发明名称
SERIOUS LINE ERROR RATE DETECTION CIRCUIT
摘要
申请公布号
JPH02195745(A)
申请公布日期
1990.08.02
申请号
JP19890014715
申请日期
1989.01.24
申请人
FUJITSU LTD
发明人
YORITA TAKASHI
分类号
H04L1/00
主分类号
H04L1/00
代理机构
代理人
主权项
地址
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