Add-compare-select instruction

摘要

An apparatus includes memory storing an instruction that identifies a first register, a second register, and a third register. Upon execution of the instruction by a processor, a vector addition operation is performed by the processor to add first values from the first register to second values from the second register. A vector subtraction operation is also performed upon execution of the instruction to subtract the second value from third values from the third register. A vector compare operation is also performed upon execution of the instruction to compare results of the vector addition operation to results of the vector subtraction operation.

主权项

1. An apparatus comprising:
a memory storing an instruction that identifies a first register, a second register, and a third register, wherein upon execution of the instruction by a processor:
a vector addition operation is performed by the processor to add first values from the first register to second values from the second register;a vector subtraction operation is performed to subtract the second values from third values from the third register; anda vector compare operation is performed to compare results of the vector addition operation to results of the vector subtraction operation.