| 摘要 |
<p>PURPOSE:To generate a pulse train with a large pulse interval or pulse width without expanding the scale of a circuit by providing a reference clock generation circuit, an arithmetic control circuit, a counter, a control FF, and an output FF. CONSTITUTION:The arithmetic control circuit l calculates the rise and fall time of a pulse having prescribed pulse interval and pulse width, and sets them on a register 15. The counter 16 is operated by the reference clock 2a of the reference clock generation circuit 20, and a comparator 17 compares the content of the register 15 with the count value of the counter 17, and outputs a coincidence signal when they coincide. The control FF 18 inputs data effective information from the circuit 1, and writes time information from the circuit 1 when receiving a command from the circuit 20. The output FF 19 generates a required output pulse 13 corresponding to the AND of the coincidence signal from the counter 17 and the output of the FF 18. By employing such constitution, it is possible to generate the pulse of long cycle and with wide width with a small number of bits of the counter.</p> |
