| 摘要 |
<p>PURPOSE:To prevent a stress from being imposed on an internal wiring or the like by providing an internal clock generating circuit generating an internal clock of a period of 0.001-10sec and a clock switching circuit supplying the internal clock to an integrated circuit main body when no external clock is supplied. CONSTITUTION:An internal clock generating circuit 20 generates a low speed internal clock, that is, an internal clock having a period of 0.001-10sec and a clock switching circuit 30 supplies its external clock to an integrated circuit main body 40 when an external clock is inputted from an external clock input terminal 10 and supplies the internal clock to the integrated circuit main body 40 when no external clock is supplied. Thus, it is possible to keep a level of an output node of a transfer gate to a normal 'L' or 'H' level, the flowing of an excess current to a wiring or the like is prevented and stress imposed on the internal wiring of the integrated circuit is avoided.</p> |
