FREQUENCY MULTIPLYING CIRCUIT

摘要

The frequency doubler circuit includes (a) a delay part having inverters (G0-G4) to delay and turn over a reference frequency, and a condenser (CO) to delay the reference frequency by charging/ discharging and (B) a logic part (20) haivng buffers (G6-G7) and an exclusive-OR gate which performs exclusive-OR function according to delayed frequency and reference frequency. The circuit generates a double frequceny of a reference frequency.