| 摘要 |
PURPOSE: To inhibit the latch-up of an integrated circuit by monitoring the bias of base-emitter junction in either an SCR lateral bipolar transistor or a vertical bipolar transistor and holding the bias to a value that inhibits the excitation of SCR. CONSTITUTION: The circuit 100 contains a comparator 102 having non-inversion input connected to input power voltage and inversion input connected to a substrate 22 by an electrode 104. The comparator 102 monitors a potential difference on the base-emitter junction of the lateral parasitic transistor and supplies a positive output signal or the output signal of logic 1 to the output 106 so that the base-emitter voltage is not biased in a forward direction to be a value not less than a previously decided value. Since the base-emitter junction of the lateral transistor is not permitted to be biased in the forward direction to a degree sufficient for turning on the transistor, the excitation of a silicon control rectifier(SCR) structure and that of a latch-up state are prevented. |
