发明名称 |
PERIPHERAL APPARATUS FOR IMAGE MEMORIES |
摘要 |
The peripheral LSI appt. comprises a read data processing unit sending the data of a selected one among n pixels read from the DRAM blocks in parallel to an external image/graphics processor. A write data processing unit modifies the image data taken into it and writes the modified data into the DRAM blocks. A feedback data processing unit writes the image data now on displaying into the DRAM blocks after a desired processing again. A display data procesing unit sends the data read from the DRAM blocks to a monitor for display and to the external processor for the feedback processing. A control unit furnishes control signals to those processing units in response to instructions from the external processor.
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申请公布号 |
KR900005297(B1) |
申请公布日期 |
1990.07.27 |
申请号 |
KR19850006449 |
申请日期 |
1985.09.04 |
申请人 |
HITACHI LTD. |
发明人 |
KOBAYASHI YOSHIKI;TAKENAGA HIROSHI;KATOH TAKESHI |
分类号 |
G06F12/04;G06F12/06;G06T1/20;G09G5/39;(IPC1-7):G06F15/64;G06G1/16 |
主分类号 |
G06F12/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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