发明名称 Semiconductor device containing HEMT and MISFET and method of forming the same
摘要 A semiconductor structure with a MISFET and a HEMT region includes a first III-V compound layer. A second III-V compound layer is disposed on the first III-V compound layer and is different from the first III-V compound layer in composition. A third III-V compound layer is disposed on the second III-V compound layer is different from the second III-V compound layer in composition. A source feature and a drain feature are disposed in each of the MISFET and HEMT regions on the third III-V compound layer. A gate electrode is disposed over the second III-V compound layer between the source feature and the drain feature. A gate dielectric layer is disposed under the gate electrode in the MISFET region but above the top surface of the third III-V compound layer.
申请公布号 US9418901(B2) 申请公布日期 2016.08.16
申请号 US201414515392 申请日期 2014.10.15
申请人 Taiwan Semiconductor Manufacturing Company, Ltd. 发明人 Chou Chung-Yen;Liu Sheng-De;Yang Fu-Chih;Liu Shih-Chang;Tsai Chia-Shiung
分类号 H01L29/66;H01L21/8252;H01L29/778;H01L27/06;H01L27/085;H01L29/51;H01L29/10;H01L29/20 主分类号 H01L29/66
代理机构 Slater Matsil, LLP 代理人 Slater Matsil, LLP
主权项 1. A method comprising: forming a stack of semiconductor layers over a substrate, each semiconductor layer in the stack of semiconductor layers having a different band gap than an adjacent semiconductor layer in the stack of semiconductor layers; forming a capping layer over the stack of semiconductor layers, the capping layer comprising a first source opening, a first drain opening, a second source opening, and a second drain opening; simultaneously forming first and second source and drain features in the respective first and second source and drain openings; forming a first gate opening in the capping layer between the first source feature and the first drain feature; forming a gate dielectric layer in the first gate opening; after forming the gate dielectric layer, forming a second gate opening in the capping layer between the second source feature and the second drain feature; and simultaneously forming a gate electrode layer in the first gate opening and the second gate opening.
地址 Hsin-Chu TW