| 摘要 |
PURPOSE:To practically speed up an operation without taking into consideration the allocation of data to each data storing RAM by simultaneously writing the same data to the same address in the two data storing RAMs. CONSTITUTION:When the simultaneous write instruction is executed, an instruction decoder 14 outputs a simultaneous write supporting signal 15, further the same first data bus 2, first address bus 2, first write strobe signal line 5 are connected to a first RAM 1 and a second RAM 6, and the data on the first data bus 2 are simultaneously written to the same addresses of the first RAM 1 and the second RAM 6. In the other cases, since the instruction decoder 14 does not output the simultaneous write supporting signal 15, a second data bus 8, a second address bus 10 and a second write strobe signal line 13 are connected to the second RAM 6, and the address different from that of the first RAM 1 can be transferred to the RAM 6. |
