发明名称 Circuit arrangement for simulating a variable impedance, particularly an ohmic resistance
摘要 A circuit arrangement for simulating a variable impedance is specified which exhibits a current/voltage converter (1), the output of which is connected to a voltage proportional element (7). The output (9) of the voltage proportional element (7) is fed back to a second input (3) of the current/voltage converter (1) in such a manner that the output voltage (UE) is adjusted in such a manner that it corresponds to the load voltage (UL). The value of the simulated resistance (R) can be varied by varying the proportionality factor of the voltage proportional element (7). <IMAGE>
申请公布号 DE3901314(A1) 申请公布日期 1990.07.26
申请号 DE19893901314 申请日期 1989.01.18
申请人 KNICK ELEKTRONISCHE MESSGERAETE GMBH & CO, 1000 BERLIN, DE 发明人 SEHRIG, GORDIAN, DIPL.-ING., 1000 BERLIN, DE
分类号 H03H11/46 主分类号 H03H11/46
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