| 摘要 |
<p>The invention relates to automatic phase adjustment in a phase locked loop including an oscillator (Os) with a controllable frequency. The oscillator generates a timing signal which is used together with a received data signal (1) to form two pulse trains (9,10) which comprise pulses of a duration which in the first pulse train (9) is independent of, and in the second pulse train (10) is responsive to, the phase position of the timing signal relative the phase position of the data signal. The pulse trains are utilized to form a control signal to the oscillator (Os). In forming the pulse trains (9,10), there is utilized a first array of signals (6-8) which are formed by the data signal (1) being sampled in several different phase positions with the aid of mutually phase shifted clock signals (2-4). A rapid locking-in of the phase locked loop is obtained in accordance with the following. The signals in the first array are sampled simultaneously with the aid of a common clock signal (11), whereby a second array of signals (12-14) is formed. The signals (12-14) in the second array are compared with each other and an error signal (15,16) is formed if there is deviation. The error signal is used to amplify the control signal to the oscillator (Os).</p> |
