| 摘要 |
PURPOSE:To reduce an overhead required for a conditional branch by writing a couple of arithmetic data and a state variable in a storage device and processing the arithmetic data according to an instruction code and the state variable. CONSTITUTION:An instruction containing an instruction code OPC and a state variable specifying code and data consiting of arithmetic data A and B and state variables CA and CB are read out of the storage device 14 and stored in an instruction register 4 and input registers 5 and 6 respectively. The instruction code OPC and variables CA and CB are decoded 2 and a computing element 1 processes the data A and B according to the conditions of those three kinds of parameters and outputs the arithmetic result X and an overflow signal V to a state variable generating circuit 3. The circuit 3 generates a state variable CX to be outputted according to the signals X and V and code SC and inputs it to an output buffer 7. The buffer 7 stores a couple of the variable CX and arithmetic result X in the device 14. An address generating circuit 8 is controlled by the output signal of the decoder 2 to perform conditional branching operation and arithmetic integrally by one instruction. |
