发明名称 INTEGRATOR CIRCUIT NETWORK
摘要 PURPOSE: To facilitate the production by connecting a first (second) input point to the input point of a first (second) current memory cell and connecting the first output point of the second current memory cell to the input point of the first current memory cell and connecting the second output point to the output point of an integrator circuit network. CONSTITUTION: An input point 1 is coupled to the input point of the first current memory cell consisting of transistors TRs T1 and T2, a capacitor C1, and a switch S1. An input point 5 is coupled to the input point of the second current memory cell consisting of TRs T3 to T5, a capacitor C2, and a switch S3 through a switch S2. The second current memory cell has two output points (from the drain electrode of the TR T4 and from that of the TR T5), and the first output is fed back to the input point of the first current memory cell, and the second output is given to an integrator output point 8. Thus, the same function as a capacitor switching double wire no-loss integrator is realized without requiring a precisely defined capacitor.
申请公布号 JPH02189695(A) 申请公布日期 1990.07.25
申请号 JP19890314461 申请日期 1989.12.05
申请人 PHILIPS GLOEILAMPENFAB:NV 发明人 JIYON BARII HIYUUZU
分类号 G06G7/184;G11C27/02 主分类号 G06G7/184
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