发明名称 PURINTOBANNOSHINDANHOHO
摘要 PURPOSE:To enable the quick formation of the correspondence chart between log addresses and flip-flops and the collection of log data in a short time by simulating the circuitry of a printed board mounted with an integrated circuit having log-out circuits with software, making the correspondence chart between the log addresses and the flip-flops and diagnosing the printed board. CONSTITUTION:Respective flip-flops FFa, FFb are expressed respectively by 36 bits in software and the names of the respective flip-flops are given. If, for example, the number of the flip-flops is assumed to be 512, each flip-flop can be discriminated by 9 bits and therefore the numbers in the hardware of the flip- flops are expressed by using 9 bits among 36 bits. Log addresses are given in such a way and one of the addresses is drawn out. This stage is equivalent in the hardware to the state wherein one of the log addresses of 9 bits are given to a pin 12, one of the lines l0-l511 is selected by a decoder 16 and one, for example, G1 of NOR gates is opened. When G1 opens, the content of the flip-flop FFa is outputted through G1 and an OR gate G3 to a log-out pin 14.
申请公布号 JPH0233105(B2) 申请公布日期 1990.07.25
申请号 JP19820157772 申请日期 1982.09.10
申请人 FUJITSU LTD 发明人 HIDAKA HISAO
分类号 G01R31/28 主分类号 G01R31/28
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