INTEGRATED CIRCUIT WITH LATCH-UP PROTECTIVE CIRCUIT IN COMPLEMENTARY MOS CIRCUIT TECHNIQUES

摘要

An integrated circuit has a storage cell and complementary MOS-circuit technology. A substrate bias voltage generator connects a semiconductor substrate having a well region inserted therein to a substrate bias voltage. In order to avoid latch-up effects, an electronic protection circuit connects a current path, for charging a capacitor of the storage cell, only after a delay time DELTA T following a switch-on of the integrated circuit.