发明名称 |
Delay circuit for semiconductor integrated circuit devices |
摘要 |
A delay circuit for an IC device is disclosed, which comprises a charging/discharging circuit, a voltage divider and a comparator. The charging/discharging circuit selectively effects a charging/discharging operation in response to an input sigal to thereby generate a variable output voltage. The voltage divider divides a source voltage of the IC device to provide a reference voltage having a predetermined constant potential. The comparator is coupled to the charging/discharging circuit and voltage divider at its inverting input and non-inverting input, respectively, and compares the output voltage of the charging/discharging circuit with the reference voltage. A switch circuit is provided which performs a switching operation in response to the input signal to thereby electrically disconnect the non-inverting input of the comparator from the voltage divider. A capacitor is provided which retains the reference voltage at the non-inverting input of the comparator while the comparator is electrically disconnected from the voltage divider.
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申请公布号 |
US4943745(A) |
申请公布日期 |
1990.07.24 |
申请号 |
US19890437294 |
申请日期 |
1989.11.16 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
WATANABE, YOHJI;OHSAWA, TAKASHI |
分类号 |
G11C7/02;G11C19/18;H03K5/00;H03K5/1252;H03K5/13 |
主分类号 |
G11C7/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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