发明名称 |
APPARATUS OF ZERO PADDING FOR ENCODING VARIABLE-LENGTH SIGNALING INFORMATION AND METHOD USING THE SAME |
摘要 |
Disclosed are a zero padding apparatus for encoding variable length signaling information and a zero padding method using the same. According to an embodiment of the present invention, the zero padding apparatus comprises: a processor for deciding the number of groups to fill all bits with zero by using difference between the length of an LDPC information bit string and the length of a BCH encoded bit string, for filling all the bits of the groups with zero by selecting the groups through a shortening pattern order, and for filling the BCH encoded bit string in at least a part of the groups not to be filled with zero to generate the LDPC information bit string; and a memory for supplying the LDPC information bit string to an LDPC encoder. |
申请公布号 |
KR20160105312(A) |
申请公布日期 |
2016.09.06 |
申请号 |
KR20160020867 |
申请日期 |
2016.02.22 |
申请人 |
ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE |
发明人 |
PARK, SUNG IK;KWON, SUN HYOUNG;LEE, JAE YOUNG;KIM, HEUNG MOOK |
分类号 |
H03M13/27;H03M13/00;H03M13/11 |
主分类号 |
H03M13/27 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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