发明名称 Ultra fast logic
摘要 The logic has an extremely high speed, very low number of components and large common mode rejection, and is intended to eliminate the emitter-coupled logic (ECL). The supply voltage and power consumption are small. The logic is particularly for digital systems requiring extremely fast and complex digital processing, such as supercomputers. One basic gate is responsive to and providing differential binary signals, and comprises a pair of transistors of opposite conductivity types, each having a base, emitter and collector, wherein the bases are separately coupled to gate inputs, the emitters are coupled together, and the collectors are separately coupled to gate outputs and further to a power supply via biasing resistors. Based on the basic gate is a memory cell which includes a positive feedback resistor and can be read and written via a single terminal.
申请公布号 US4943740(A) 申请公布日期 1990.07.24
申请号 US19880180431 申请日期 1988.04.12
申请人 GULCZYNSKI, ZDZISLAW 发明人 GULCZYNSKI, ZDZISLAW
分类号 G11C11/40;G11C11/41;H03K3/286;H03K19/082;H03K19/21 主分类号 G11C11/40
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