| 摘要 |
PURPOSE:To enable the transfer of clocks even when two clock frequencies are distant by >=2 times by outputting an output clock which is a phase-adjusted clock having a phase which is distant by more than a specific value from the phase of an input clock when the phases of the input clock and output clock are approached with each other. CONSTITUTION:A register 3 inputs an input signal in synchronism with the input clock CLK1. A shift register 6 fetches data from a register 5 in synchronism with an output clock CLK2. When a detecting circuit 1 detects the phase of the input clock CLK1 and the phase of the output clock CLK2 are approached with each other, a mask circuit 2 masks the output clock CLK2 and outputs the phase-adjusted clock CLK2A having a phase which is distant by more than the specific value from the phase of the input CLK1 to the register 5. Consequently, the register 5 is stored with an internal signal which operates with the input clock CLK1 in a stable state with the phase-adjusted clock CLK2A from the mask circuit 2. |
