发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To reduce the area of an emitter equivalently, to decrease currents injected from the base of a reverse NPN element and to increase the speed of an I<2>L by forming an obstacle, such as a shallow N<+> layer, a V-shaped groove, etc. to the base layer of the lateral PNP element of the I<2>L. CONSTITUTION:The shallow N<+> layers 501 are shaped among an injector 41 and the P bases 42 of the reverse NPN elements as the obstacles. The layers 501 are formed at the same time as the N<+> collar 52 of the I<2>L and the N collectors 51 of the reverse NPN are shaped, and may be contacted or stacked to the layers 42, 21. According to this constitution, when the injector is at OV and the base of the reverse NPN element is at VBV, currents injected from the base of the reverse NPN element are decreased, and the lower limit value of the current gains betai of the reverse NPN element required for operating the I<2>L can be lowered. The device can operate at high speed because holes stored among the layers 41, 42 are reduced.
申请公布号 JPS5840854(A) 申请公布日期 1983.03.09
申请号 JP19820137228 申请日期 1982.08.09
申请人 HITACHI SEISAKUSHO KK 发明人 WATABE TOMOYUKI;TORIYABE TATSU;OKABE TAKAHIRO;NAKAMURA TOORU;KANEKO KENJI;OKADA YUTAKA
分类号 H01L21/8226;H01L27/02;H01L27/082 主分类号 H01L21/8226
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