发明名称 |
Methods of operating and forming semiconductor devices including dual-gate electrode structures |
摘要 |
A semiconductor device may include a semiconductor substrate with first and second spaced apart source/drain regions defining a channel region therebetween and a control gate structure on the channel region between the first and second spaced apart source/drain regions. More particularly, the control gate structure may include a first gate electrode on the channel region adjacent the first source/drain region, and a second gate electrode on the channel region adjacent the second source/drain region. Moreover, the first and second gate electrodes may be electrically isolated. Related devices, structures, methods of operation, and methods of fabrication are also discussed. |
申请公布号 |
US9449677(B2) |
申请公布日期 |
2016.09.20 |
申请号 |
US201414537387 |
申请日期 |
2014.11.10 |
申请人 |
Samsung Electronics Co., Ltd. |
发明人 |
Kim Jiyoung;Oh Yongchul;Woo Dongsoo;Chung Hyun-Woo;Jin Gyoyoung;Choi Sungkwan;Hong Hyeongsun;Hwang Yoosang |
分类号 |
G11C11/40;G11C11/4096;H01L27/108;G11C11/404;G11C11/408;H01L29/417;H01L29/423;H01L29/66;H01L29/78;H01L21/8234 |
主分类号 |
G11C11/40 |
代理机构 |
Myers Bigel & Sibley, P.A. |
代理人 |
Myers Bigel & Sibley, P.A. |
主权项 |
1. A method of operating a semiconductor memory device comprising a semiconductor substrate including first and second spaced apart source/drain regions defining a channel region therebetween, a control gate structure on the channel region, and a memory storage capacitor electrically coupled to the second source/drain region, the method comprising:
applying a write/read-enable voltage to the control gate structure across the channel region to allow electrical current flow through the channel region between the first and second source/drain regions; while applying the write/read-enable voltage, applying a write signal through the first source/drain region, the channel region, and the second source/drain region to the memory storage capacitor to charge/discharge the memory storage capacitor thereby writing a memory value to the memory storage capacitor; and after applying the write signal, applying different first and second stand-by voltages to different portions of the control gate structure adjacent the channel region to maintain the memory value of the memory storage capacitor. |
地址 |
KR |